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2017. gada 1. novembris
On October 20 of this year, a project management meeting was held at Ventspils University of Applied Sciences, chaired by VIRAC director V. Avotiņš. During the meeting, the researchers presented the achievements of the scientific activity in the first half of the year. It is planned to implement six activities in the project in order to achieve the set goal of the project. The aim of the project is to develop a theory and evaluate the methodology, stepwise procedure and tools for designing asynchronous circuits in a reconfigurable environment. In the first half of the year, the scientific staff worked on Activity 1 “Development of an Implementation Model”, as a result of which a technical report was prepared. Based on the implementation model, two asynchronous adder circuits were developed for implementation in the reconfigurable environment. A test methodology was developed, the operation of the circuits was experimentally tested and confidence was created that the adder was working stably. The results of the project were presented in a report: V. Gopeyenko, I. Lemberski, Implementation of Asynchronous Design in Reconfigurable Environment, International Scientific Conference “Baltic Applied Astroinformatics and Space Data Processing”, August 23-24 this year, organized by Ventspils University of Applied Sciences. During this period, i.e. In the first half of the year, the planned fixed assets were purchased in the project - personal stationary and portable computers and other items related to computer equipment.
Currently, the Project team has started the second project activity "Decomposition" Development of methods and algorithms. The scientific literature in the field of decomposition is selected and the existing decomposition algorithms are analysed, which are described in the literature.
The research will be implemented in the ERDF Operational Program “Growth and Employment” 1.1.1. Specific support objective “To increase the research and innovation capacity of Latvian scientific institutions and the ability to attract external funding by investing in human resources and infrastructure” 1.1.1.1. within the framework of the measure “Practical Orientation Research”. The project will be implemented for 36 months, until February 29, 2020. Project “Asynchronous Logic Circuits: Methods and Software Tools for Designing in a Configurable Environment”, No. 1.1.1.1/16/A/234, the funding is EUR 287 891.90.
For more detailed information: infovirac@venta.lv
E-pasts: virac@venta.lv
Tālrunis: +37163629656
Ekskursijas: +37129230818
Inženieru iela 101, Ventspils, LV-3601
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