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Project researchers will report on the progress of the project

maijs 30, 2018

Project researchers will report on the progress of the project

On June 1 of this year at 13:00, Ventspils University of Applied Sciences, in auditorium D407 will host a scientific seminar of Ventspils University of Applied Sciences Institute of Engineering “Ventspils International Radio Astronomy Centre” (VIRAC) project “Asynchronous Logic Circuits: Methods and Software Tools for Designing in a Configurable Environment”, in which the researchers involved in the project will present their achievements in March, April and May.


It is planned to discuss the topicalities of the project in the project seminar, as well as the project scientific staff will present the achievements and achievements in the 3rd project implementation activity “Minimization of the function”. The administrative management of the project will inform the scientific staff about the necessary administrative activities to be performed in accordance with the project implementation guidelines.


The research will be implemented in the ERDF Operational Program “Growth and Employment” 1.1.1. Specific support objective “To increase the research and innovation capacity of Latvian scientific institutions and the ability to attract external funding by investing in human resources and infrastructure” 1.1.1.1. within the framework of the measure “Practical Orientation Research”. The project will be implemented for 36 months, until February 29, 2020. Project “Asynchronous Logic Circuits: Methods and Software Tools for Designing in a Configurable Environment”, No. 1.1.1.1/16/A/234, the funding is EUR 287 891.90.


For more detailed information: infovirac@venta.lv

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